搜索资源列表
DELAY1
- 本程序以ISE为开发平台，采用VHDL为开发语言，实现了对一个时钟信号延时的功能-the procedures to ISE for the development platform for the development of VHDL language, Implementation of a clock signal delay function
yanshi.rar
- 给予VHDL的延时函数 是简单的开始时间的延时,VHDL delay to the start of the function is a simple time delay
20081129464173846
- 介绍Verilog HDL, 内容包括： – Verilog应用 – Verilog语言的构成元素 – 结构级描述及仿真 – 行为级描述及仿真 – 延时的特点及说明 – 介绍Verilog testbench • 激励和控制和描述 • 结果的产生及验证 – 任务task及函数function – 用户定义的基本单元(primitive) – 可综合的Verilog描述风格-Introduced the Verilog HDL, in
switch
- 该模块是一个基于verilog的脉冲触发高低电平保持的模块，同时包含了消抖的功能。 主要是针对现今许多开发板上开关是弹簧式的手按下去为低电平，手一松就变成了高电平。只要按一次松开后，模块就能自动输出一个低电平。（板子上的开关正常情况为高电平） 同时消抖部分在输入clk为50Mhz的时候可以延迟21ms来判断是否为开关按下-The module is based on verilog pulsed high-low to keep the trigger module includes b
VHDL
- 介绍Verilog HDL, 内容包括：Verilog应用，Verilog语言的构成元素，结构级描述及仿真 ，行为级描述及仿真，延时的特点及说明 介绍Verilog testbench，激励和控制和描述 结果的产生及验证，任务task及函数function 用户定义的基本单元(primitive)，可综合的Verilog描述风格等-Introduction Verilog HDL, including: Verilog applications, Verilog language
SPI
- 实现SPI的读写功能，包括准确的延时功能-Implement the SPI read and write capabilities, including accurate delay function
LED
- 实验名称: SPI接口实险，LED数据管显示。 实验目的: 学习AVR单片机的SPI功能 实验现象: 1、程序通过SPI接口输出数据到HC595芯片驱动LED数据管简单显示。 2、内部1 M晶振，程序采用单任务方式，软件延时。-Experiment name: SPI interface, the real danger, LED data display tube. Experimental purposes: learning the AVR SPI function ex
adder128x
- 128位加法器优化设计：64位加法运算+2-1多路选择器。并在关键路径上添加寄存器，降低延迟。 testbench可以测试优化的效果，在ISE中做过综合，能跑到200+MHz-128-bit adder optimization design: 64-bit adder+ 2-1MUX. In the key path, there are regs to improve the performance and reduce the delay time. you use the tes
delay_add
- 利用Vivado高层次综合实现的用HDL语言描述的时序的delay函数-realize a delay function, which is described by the Verilog, by Vivado
Han-carlson.ppt
- Abstract—Variable latency adders have been recently proposed in literature. A variable latency adder employs speculation: the exact arithmetic function is replaced with an approximated one that is faster and gives the correct result most of the time,
watch_dog
- 基于EPM1270F256实现的4路看门狗控制逻辑，实现了滤波、延时、复位功能。-Based on EPM1270F256 4 road guard dog control logic, to realize the function of filtering, time delay and reset.
sa261
- Calculation crosshairs diffraction image at different distances, Including the generalized cross-correlation function GCC time delay estimation, PV modules contain, MPPT module, BOOST module, inverter module.
led
- 利用计数器设计延时函数，通过四个led灯的闪烁，可以直观观察延时时长，fpga器件cyclone iv LCMXO2-1200HC-4TG144CR1,在demo板上作简路图(Using the counter to design the delay function, through the flashing of four LED lights, we can observe the delay time directly, FPGA device cyclone IV LCMXO2-12