搜索资源列表
des-verilog
- des加密算法的verilog语言的实现-des encryption algorithm to achieve the Verilog language
DES-source-code-by-HDL
- HDL实现的DES算法，及相关的Test bench激励文件-HDL achieve the DES algorithm, and the related documents incentive Test bench
DES.zip
- DES 加密算法的实现，使用硬件描述语言VHDL编写,DES encryption algorithm realization, uses hardware descr iption language VHDL to compile
DES101
- 数据加密算法（Data Encryption Algorithm，DEA）的数据加密标准（Data Encryption Standard，DES）是规范的描述，它出自 IBM 的研究工作，并在 1997 年被美国政府正式采纳。它很可能是使用最广泛的秘钥系统，特别是在保护金融数据的安全中，最初开发的 DES 是嵌入硬 件中的。通常，自动取款机（Automated Teller Machine，ATM）都使用 DES。文件是DES代码的VHDL描述 -Data encryption algor
DES_IP
- 有效的改进3-DES算法的执行速度，采用了多级流水线技术，设计了一种高速的硬件结构，使得原来需要48个时钟周期才能完成的运算，现在只需要一个时钟周期就可以完成。另外通过增加输入/输出的控制信号。使得该IP可以方便的集成到SOC中，大大缩短了SOC的设计周期。-Effective 3-DES algorithm to improve the implementation of speed, multi-stage pipeline technology, designed a high-speed
DES
- DES算法的FPGA实现 希望能有用 。-DES algorithm can be useful to achieve the desired FPGA
DES
- DES加密算法的VHDL实现,采用流水线技术实现-The VHDL implement of DES encrypt algorithmic
quartus
- des algorithm send rx from serial port
DES-HDL
- 用HDL实现的DES加密算法，通过前仿真，希望对大家有帮助-HDL implementation of the DES with the encryption algorithm, by pre-simulation, we want to help
SSSSS
- 一种实用的基于FPGA的加密算法的设计，有AES和DES-A practical FPGA-based design of encryption algorithm, AES and DES have
program
- This is various parts of encryptor part of DES algorithm.
Description-of-DES-with-VHDL
- 用VHDL描述DES算法 用硬件的方式DES加解密 体现了硬件编程人一般思想-DES algorithm using VHDL descr iption of the way with hardware DES encryption and decryption hardware programming reflects the general thinking of people
Barrel-shifter-design-report
- 实现变量移位操作的32-bit桶形移位寄存器；实现DES算法的数据路径设计及控制路径设计，有仿真和附录verilog代码 -Variable shift operations to achieve 32-bit barrel shifter implement the DES algorithm data path and control path design design
FPGA-BASIC-DES
- 采用vhdl实现DES算法，有详细的设计理论。为电子科技大学研究生论文。-VHDL realize the use of DES algorithm, a detailed design theory. For the University of Electronic Science and Technology Graduate thesis.
SIMULATION-AND-SYNTHESIS-OF-TRIPLE-DES-BLOCK-CIPH
- This project presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously introduced technique to protect smart card implementations from these
des1
- 对称密码算法des的Verilog语言实现，已经测试通过。欢迎下载！-Symmetric cryptographic algorithm of des Verilog language implementation, has the test pass. Welcome to download!
test-des
- Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorit
Encrypt_Decrypt(DES)_Verilog
- Encrypt and decrypt DES algorithm in verilog
des
- des algorithm Simple