搜索资源列表
1024FFT-verilog-hdl
- 基于spartan 3e 的IFFT算法verilog HDL程序-Based on the verilog 3e Spartan IFFT algorithm of HDL program
studyFFTcore
- 调用FPGA的IP核实现FFT运算，在xilinx的vertex4sx55FPGA的实现-Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA
cfft_latest.tar
- VHDL 1024 FFT PROJECT
fft_st
- 用NIOS2核建的FFT工程，能够对输入的数据进行FFT或IFFT变换。-FFT with NIOS2 nuclear construction projects, to input data on FFT or IFFT transform.
IFFT_RTL_code
- IFFT的RTL级编程，包括逆FFT转化及信息的处理。应该说比较全面，且经过验证-IFFT of the RTL-level programming, including the inverse FFT transformation and information processing. Should be said that a more comprehensive, and proven
99341857matlab
- FFT algorithms FFT, IFFT, power spectrum calculation, including the Hamming window, Hanning window, triangle window, Blackman window, 4 term Blackman-Harris window of several of the power spectrum window function computing power.
ofdm_vhdl
- OFDM的VHDL代码，ofdm_vhdl文件，包括fft，ifft等模块，能正确运行得到结果-The VHDL code for OFDM, ofdm_vhdl documents, including fft, ifft other modules, can get the results correctly
FPGA_implementation_FFTIFFT
- 一篇关于使用VHDL在FPGA上实现FFT//IFFT的文章-Anarticle about Efficient FPGA implementation of FFT/IFFT processing
fft16
- 256点的FFT/IFFT变换VERILOG代码核。-256-point FFT/IFFT transform VERILOG code that nuclear.
IFFT
- 使用ISE开发环境实现802.11a物理层OFDM系统中逆fft模块-ISE development environment inverse fft module 802.11a physical layer OFDM system
fft
- 基于IP核的FFT，可以实现FFT，同时可以实现IFFT-IP core based FFT, can achieve FFT, IFFT can be achieved simultaneously
Transmitter
- 基于hdl的ofdm基带处理器发射机的设计与实现 包括 工作时钟 主控单元 导频插入 长短训练序列生成 data符号调制 循环前缀与加窗处理 IFFT/FFT 信道编码 扰码模块等-Hdl of ofdm transmitter baseband processor based design and implementation including work clock master unit pilot insertion length of the training sequence g
fft_ifft
- fft and ifft code in verilog
pipelined_fft_256
- pipelined fft/ifft 256 point ip core
pipelined_fft_64-master
- Pipelined FFT/IFFT 64 points (Fast Fourier Transform) IP Core User Manual