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Bintograyconverter
- 二进制到格雷码转换ASD ASD ASD-binary Gray code conversion to ASD ASD ASD ASD ASD
counter_3
- 三种计数器的verilog实现,二进制计数器,格雷码计数器,约翰逊计数器.初学硬件描述语言可参考。-Three kinds of counter verilog implementation of a binary counter, gray code counter, Johnson counter beginner hardware descr iption language can refer to
graycnt_3
- 3位格雷码计数器的verilog描述及仿真波形-3 Gray code counter verilog descr iption and simulation waveforms
FIFO_Design
- 一种基于格雷码的异步FIFO设计与实现,8*8位的fifo VHDL 源码-Gray-code based on the Asynchronous FIFO Design and Implementation
clock_domain_process
- 一种将异步时钟域转换成同步时钟域的方法，可节省资源，避免格雷码转换。-A will be converted to asynchronous clock domain synchronous clock domain methods, can save resources, and avoid the Gray code conversion.
binary_to_gray
- 将二进制数转化为格备码，4位并行。binary_input为二进制数输入， gray_output为格雷码输出。-Will be converted into binary code grid preparation, 4-bit parallel. binary_input for binary input, gray_output for the Gray code output.
fifo_ptrs_gray
- fifo pointers in verilog gray code utilization for synchronius
dekoder
- dekoder code s Gray to cod „ 1 from 16”. This is program i VHDL-dekoder code s Gray to cod „ 1 from 16”. This is program i VHDL
binary to gray and gray to binary code converter
- this project is based on 4bit binary to gray and gray to binary code converter using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be
GrayCnt
- 格雷码计数器 VerilogHDL语言编写-Gray-code counter using VerilogHDL language
vhdlcoder
- 本文件夹包含了16个VHDL 编程实例，仅供读者编程时学习参考。 一、四位可预置75MHz -BCD码（加/减）计数显示器（ADD-SUB）。 二、指示灯循环显示器（LED-CIRCLE) 三、七人表决器vote7 四、格雷码变换器graytobin 五、1位BCD码加法器bcdadder 六、四位全加器adder4 七、英语字母显示电路 alpher 八、74LS160计数器74ls160 九、可变步长加减计数器 multicount 十、可
Binary.code.Gray.code.converter
- 二进制码格雷码转换器 进行二进制码格雷码转换，vhdl，QuartusⅡ-Binary code Gray code converter
2
- 格雷码转换 计数器的实现 两个程序的实现-Gray code conversion Implementation of counter
Gray-Counter
- 格雷码，用于理解格雷码的的功能，减少出错。同样对于卡诺图很用吧。-Gray code, Gray code, the function used to understand and reduce errors. The same for the Karnaugh map.
binary-and-gray
- 二进制码和格雷码互相转换verilog源码-Binary code and Gray code conversion verilog source
gray
- 这个程序实现的是格雷码和二进制码的转换的问题的-This program is to achieve a Gray code and binary code conversion problems
grey-code--FIFO-IP-core
- 基于格雷码的FIFO的IP核，调试可用于通信接口的队列传输。-Gray code based on FIFO IP core, debugging can be used for communication queue transmission interface.
VHDL-Gray-code
- 基于vhdl格雷码设计代码，调试过没错误。-Gray code design based on VHDL code, debugging didn t mistake.
encoder-based-on-Gray-code
- 基于VHDL格雷码编码器的设计，可以在试验箱上直接运行-Design of VHDL encoder based on Gray code, can be run directly in the chamber
Gray-code-encoder
- 1、 了解格雷码变换的原理。 2、 进一步熟悉QUARTUSII软件的使用方法和VHDL输入的全过程。 3、 进一步掌握实验系统的使用。 -Gray code encoder VHDL-based design