这个主要是在xilinx FPGA中双DCM连接的问题，这个问题网上资料很少，自己研究后并且仿真之后可以实现两个dcm的正常工作，实现倍频和时钟的反相-This is mainly the double in xilinx FPGA DCM connection problem which little information online, their own studies and simulation can be achieved after the normal work of the