实现了将64K低速NRZ码复接成2.048M高速HDB3码及其解复接过程，同时还用同步状态机剔除假同步和假失步的状态 -Achieved the 64K low-speed NRZ code 2.048M into high-speed multiplexing and demultiplexing HDB3 code then the process also removed using false synchronous state machine synchronization and f

this code is for orthogonal frequency devision multiplexing and it is essential for the communication blocks-this code is for orthogonal frequency devision multiplexing and it is essential for the communication blocks

基于FPGA的复分接器，包括了M序列码的产生，2路数据复接，数据分接（包括巴克码的判断）。-FPGA-based compound splitters, including M sequence code generation, 2 channel data multiplexing, data tap (including the Barker code to judge).

多路复用器的verilog代码。可以实现简单的多路复用功能-Multiplexers verilog code. Can achieve a simple multiplexing function