以太网的vhdl和verilog代码，供大家学习-Ethernet VHDL and Verilog code for everyone to learn

Very simple USB 1.1 PHY. Includes all the goodies: serial/parallel conversion, bit stuffing/unstuffing, NRZI encoding decoding. Uses a simplified UTMI interface. Currently doesn t do any error checking in the RX section [should probably check f

1.八进制计数器 2.八位右移寄存器 3.八位右移寄存器（并行输入串行输出） 4.半加 5.半加器 6.半减器 7.两数比较器 8.三数比较器 9.D触发器 10.T触发器 11.JK1触发器 12.JK触发器 13.三位全加器 14.SR触发器 15.T1触发器 16.三太门 17.有D触发器构成的6位2进制计数器 18.带同步置数的7进制减法计数器（6位右移寄存器） 19.二十四进制双向计数器 20.二选一 21

用于NI单片机电流电压采样以及显示，其中含有部分程控电流与程控电压，可用于并联限流限压电路。(It is used for sampling and displaying the current and voltage of NI single-chip microcomputer. It contains part of program-controlled current and program-controlled voltage and can be used for parallel