搜索资源列表
pci 的vhdl 源代码
- pci 的vhdl 源代码-The source code of PCI VHDL.
pcicard.rar
- pci debug card 的VHDL源代码,pci debug card of the VHDL source code
pci_verilog
- 一个pci接口的硬件描述语言的实现源代码,用verilog语言实现-a pci interface hardware descr iption language source code to achieve with verilog language
fpgaPCI
- fpga开发pci的verilog，不可多得的源代码。-FPGA development pci of verilog, rare source code.
PCI_arbi
- PCI arbi verilog source code
BusMasteringPCIExpressInAnFPGA
- This paper describes a bus mastering implementation of the PCI Express protocol using a Xilinx FPGA. While the theoretical peak performance of PCI Express is quite high, attaining that performance is a complex endeavor on top of an already complex pr
yuyincaiji
- 语音采集与回放系统源代码：1.为了使读音数据存储的时间更长，速度更快，选用了256K*16Bit的SRAM；2.为了减少单片机的控制复杂度，使用了FPGA来控制SRAM的读写操作，节约了不少单片机的I/O资源；3.为了以后的高速数据存储，本设计中加入了fifo,其位宽及深度可在程序中自由设置，方便灵活。-Speech acquisition and playback system source code: 1. In order to make pronunciation longer data
opencore_crt
- 可以在Altera QuartusII下编译的Open Cores PCI桥源代码，是经过多天辛勤整理修改才完成的-Open Cores PCI bridge source code that can be compiled at Altera QuartusII. Modified under many days of hard work
sopcfpga
- 一个Altera Cyclone PCI开发板的配套样板源代码-Sample source code for An Altera Cyclone PCI development board
pci_32tlite_oc
- 嵌入式 pci总线IP core的rtl源代码，用Verilog实现-Embedded pci bus IP core of the rtl source code, Verilog realization of
testbench
- altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。-altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.
pci
- pci总线源代码，总线设计参考。适合于飓风系列FPGA设计参考。-pci bus source code, the bus design. For hurricane series FPGA design.
LIP4301CORE_PCI
- PCI Verilog source code
Xilinx_PCIE_DMA
- Xilinx芯片所有关于PCI Express接口的DMA源代码，包含相关的配套的文档资料。-Xilinx chip on the PCI Express interface for all DMA source code, including relevant supporting documentation.
PCIbus_Verilog
- PCI总线（Slave）接口FPGA的实现代码，全部为Verilog语言源码文件，还包括测试代码，内附设计实用说明文档。-PCI Bus (Slave) interface to FPGA implementation of the code, all source code files for the Verilog language, but also test the code, included the design and practical documentation.
PCI-dio
- 基于PCI的DIO接口程序，包括verilog源程序、驱动源程序以及寄存器说明文件-PCI-DIO-based interface program, including the verilog source code, driver source code and documentation register
stratix_pci_kit-v1.0
- altera PCI总线接口参考设计源代码。使用PCI编译器中的mt64兆核函数实现PCI总线接口-altera PCI bus interface reference design source code. Using the PCI Compiler mt64 trillion nuclear functions for PCI bus interface
pci-board_latest.tar
- Its a source code for pci board in verilog language.
pci
- PCI硬核源代码,支持33.3M的时钟频率,支持IO模式和内存模式的PCI操作-PCI operation of the the PCI hard core source code, support 33.3M clock frequency to support IO mode and memory mode
PCI-MINI
- pci 32位33M的从设备接口的实现源代码，使用verilog语言设计的，对设计自己的pci软核很有参考价值。-pci 32 位 33M slave device interface source code, using verilog language design, the design of their pci soft core of great reference value.