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i2c_slv_ctrl
- I2c总线 verilog实现，可用于quartus设计-Verilog bus I2c realized, can be used to design quartus
altera_avalon_i2c_V90
- I2C IP for Quartus V9.0, can used in SOPC builder.
altera_avalon_i2c_V91
- I2C IP for Quartus V9.0 sp1, can used in SOPC builder.-I2C IP for Quartus V9.0, can used in SOPC builder.
oc_i2c_master_top_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
oc_i2c_master_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
oc_i2c_master_byte_ctrl_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
oc_i2c_master_bit_ctrl_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
components
- quartus的几个IP核（PWM,RAM,I2C）-quartus several IP core (PWM, RAM, I2C)
i2c_bus
- i2c总线控制器的verilog的实现，编译环境quartus-i2c bus controller verilog implementation, build environment quartusII
ex9
- 一个I2C通信协议的verilog代码，开发环境是Quartus 2,产生结果在数码管上显示-I2C communication protocol of a verilog code, development environment is Quartus 2, produce the results shown in the digital control
mcu-fpga
- 目录 FPGA & MCU 开发板介绍 实验1 QuartusII 软件应用 实验2 Keil C51 应用 实验3 字符型LCD YM1602 的应用 实验4 带字库的中文LCD YM12864 的应用 实验5 时钟芯片DS1302 的应用 实验6 I2C 总线器件AT24C64 的应用 实验7 数字温度传感器的应用 实验8 行列式键盘 实验9 硬件电子琴的设计 实验10 AD 与DA 的使用 实验11 简易DDS 信号源设计 实验12 用模
Verilog-IIC
- VerilogHDL语言编写的IIC 读写试验程序, 在Quartus II 8.1下面调试通过 -IIC VerilogHDL languages to read and write test procedures, the Quartus II 8.1 debugging through the following
I2C
- 语言：verilog 功能：用Verilog HDL编写的I2C主机串行通信的程序。两条总线线路：一条串行数据线 SDA， 一条串行时钟线 SCL；串行的 8 位双向数据传输位速率在标准模式下可达 100kbit/s，快速模式下可达 400kbit/s ，高速模式下可达 3.4Mbit/s；在数据传输过程中，当时钟线为高电平时，数据线必须保持稳定。如果时钟线为高电平时数据线电平发生变化，会被认为是控制信号。 仿真工具：modelsim 综合工具：quartus -Language:
eeprom_wr
- 本程序是quartus.exe 环境下经过编辑和仿真之后的eeprom中的i2C 通讯协议的驱动程序-This program is quartus.exe edited and simulation environment after the eeprom in the protocol driver i2C
i2c
- I2C IP CORE Verilog quartus-I2C IP CORE Verilog quartusii
I2C
- 本文件是在quartus II环境下编译的，功能为I2c控制模块。可作为IP核使用！-This document is compiled in quartus II environment, the function I2c control module. Can be used as IP core to use!
i2c_ctrl
- 程序是用VHDL语言在quartus开发环境中实现的I2C通信的源代码-VHDL language program is the development environment in quartus I2C communication to achieve the source code
i2c
- 基于VHDL语言的fpga I2C 口通讯的源程序，经验证可用，开发环境Quartus -VHDL FPGA I2C QUARTUS II
I2C
- i2c总线控制器。VHDL。quartus ii 编译通过。代码正确可用。-i2c bus controller。。VHDL。quartus ii compiled. Correct code is available.
i2c
- I2C总线verilog仿真，quartus(I2C bus Verilog simulation, quartus)