搜索资源列表
FPGA_jiaocheng_yu_shiyan
- 最重要的是七个从简单到复杂的实验，包括：基础实验一_FPGA_LED 基础实验二_seg7实验以及仿真 基础实验三_SOPC_LED 基础实验四_Flash烧写 基础实验五_定时器实验 基础实验六_按键以及PIO口中断实验 实验七_网卡使用 ，这些实验室用到了SOPC BUILDER 与NOIS ii ,使用Verilog 编写，有实验板和没有实验板的都可以用来学习。 其次还包括： FPGA开发板各存储器之间的联系、 多处理器文档 、 USB_UART等文档，很好用的文档，您下了相信不会后悔！-
SYNTHPIC.ZIP
- The Synthetic PIC Verion 1.1 This a VHDL synthesizable model of a simple PIC 16C5x microcontroller. It is not, and is not intended as, a high fidelity circuit simulation. This package includes the following files. Note that the licen
PROCESSOR
- PROCESSOR is a design with simple microprocessor implementation.
verilog_design_a_simple_cpu
- 用verilog设计一个简单的cpu系统-Verilog design with a simple cpu system
Hardware_Speedup_DSP_FPGA
- 现场可编程门阵列（FPGA）已经不再单纯应用在芯片与系统之间的直接互联层，在软件无线电（SDR）中，FPGA逐渐用做通用运算架构来实现硬件加速单元，在降低成本和功耗的基础上提升性能表现。SDR调制解调器的典型实现包括通用处理器（GPP）、数字信号处理器（DSP）和FPGA。而且，FPGA架构可以结合专用硬件加速单元，用来卸载GPP或DSP。软核微处理器可以结合定制逻辑，扩展其内核，也可以将分立的硬件加速协处理器添加到系统中。此外，还可将通用布线资源放在FPGA中，这些硬件加速单元可以并行运行，进
mbtutorial
- This tutorial guides you through the process of using Xilinx Embedded Development Kit (EDK) software tools, in which this tutorial will use the Xilinx Platform Studio (XPS) tool to create a simple processor system and the process of adding a cust
xsoc-beta-093
- a processor source code and simple system-on-a-chip !
processor
- The purpose of this project is to design a simple Processor Unit
processor
- 文件中包含一个简单MIIPS CPU的Verilog源代码-File contains a simple MIIPS CPU in Verilog source code
CPU
- 用Verilog HDL语言写一个简单的处理器CPU。包括IR,Control unit,A,Addsub,G,Counter,8个寄存器。-Verilog HDL language used to write a simple processor CPU. Including IR, Control unit, A, Addsub, G, Counter, 8 registers.
processor_bkup
- It is the simple processor design.It will help to visualize how to develop different modules and then finally integrate them in top module.It also contains simulation files.
simple_CPU
- 通过利用verilog语言编写一个简单的处理器，并添加存储器功能-Verilog language through the use of a simple processor, and add the memory function
simple-16-bitvhdl-cpu
- central processing unit for processor using vhdl
SimpleProcessor
- 一个简单处理器的设计 包含了一定熟练的寄存器、一个选择器、一个加法/减法器单元、一个计数器和一个控制单元-The design of a simple processor contains a certain skilled register and a selector, an addition/subtraction unit, a counter and a control unit.
lab_6
- FPGA，利用VHDL建立简单处理器（a simple processor）-FPGA, using VHDL to create a simple processor (a simple processor)
processor
- 通过verilog语言编程实现简单的微处理器，实现简单的加减和复制功能。-Through the verilog language programming simple microprocessor, simple addition and subtraction, and copy functions.
simple
- 一个简单的8位处理器完整设计过程及verilog代码,适合初 学ic设计的人用，并含有我个人写的指令执行过程，仅供参 考-A simple 8-bit processor and the complete design process verilog code, suitable for beginners ic design for human use, and contains my personal writing instruction execution, for ref
Lecture6-Bus-Architecture
- simple processor with wirting in vhdl
simProcessorEx
- 一个简单微处理器内核的VHDL程序，包含源代码（位于Source目录内）及ModelSim仿真代码（位于testBench目录内）。使用该内核进行一个功能验证程序（位于simProc_test目录内）-a simple processor core program and test code based on VHDL language
alu
- A simple ALU on Altera FPGA for learners