搜索资源列表
gps_tracking
- 澳大利亚新南威尔士大学研究的GPS接收机的FPGA跟踪模块的.v程序,包括载波跟踪环路、码跟踪环路、通道累加等模块。-The University of New South Wales, Australia, the study of the FPGA tracking GPS receiver module. V procedures, including the carrier tracking loop, code tracking loop, the channel accumulati
PN_code_capture_and_tracing
- 一个完整的pn码捕获与跟踪的VHDL源码,并行匹配滤波器捕获,锁相环跟踪.-A complete pn Code Acquisition and Tracking of the VHDL source code, parallel matched filter to capture, phase-locked loop tracking.
code
- GPS系统C_A码跟踪环的研究及FPGA实现 一篇很有价值的学术文献-GPS systems C_A code tracking loop and FPGA Implementation of a valuable academic literature
ChipTrackLoop
- chip tracking loop in vhdl
Costas
- 介绍了某直接序列扩频、QPSK调制系统接收通道中四相Costas 载波跟踪环的原理及其基于 DSP+FPGA 的实现-Introduced a direct-sequence spread spectrum, QPSK modulation system, receive path Costas carrier tracking loop four-phase principle and its implementation based on DSP+ FPGA
test_pll
- 该源码主要实现锁相环的功能,锁相环包括输入端,鉴相器,环路滤波器,压控振荡器,以及反馈信号,我们的目的是实现输入信号和反馈信号的同步,因此,该源码描述了如何让对信号进行跟踪,捕获和锁定,最后使其输入输出同步。-The source mainly realizes the function of phase-locked loop, phase-locked loop consists of input, phase discriminator, loop filter and the volta
test_pll_1
- 该源码主要实现锁相环的功能,锁相环包括输入端,鉴相器,环路滤波器,压控振荡器,以及反馈信号,我们的目的是实现输入信号和反馈信号的同步,因此,该源码描述了如何让对信号进行跟踪,捕获和锁定,最后使其输入输出同步。-The source is mainly realize the function of phase-locked loop, phase-locked loop consists of input, phase discriminator, loop filter and the vol