搜索资源列表
-
0下载：
我们小组共了一个月做的DDS,程序核心用的是Verilog HDL,有仿真波形,输出正弦波,方波,及三角波,步进可调.频率范围1HZ--10MHZ-Our group for a month to do a total of DDS, the procedure is used in the core of Verilog HDL, there are simulation waveform, the output sine wave, square wave and triangular wa
-
-
0下载：
My project is on Direct Digital Synthesiser using Verilog HDL.This project is doing by me on july 2009 in summer training at NIT Kurukshetra, India.
This DDS system generate the square wave, Triangular wave,Sine wave and saw wave with different fre
-
-
0下载：
DDS芯片产生三角波线性调频信号的FPGA程序-DDS chip generated triangular wave linear FM signal of the FPGA program
-
-
0下载：
该文件包是DDS信号发生器，包括三角波、方波、锯齿波、正弦波。而且，还可以对频率、幅度、相位进行实时修改。-The package of the DDS signal generator, including triangular, square, ramp, sine wave. Moreover, it can be frequency, amplitude, phase, real-time changes.
-
-
0下载：
基于vhdl的dds发生器，精度可达到1Hz，包含正弦波，三角波，方波-DDS based on VHDL,display resolution 1Hz, include sine wave,triangular wave, square wave
-
-
0下载：
基于FPGA的DDS设计，通过外接DA转换器输出稳定的正弦波，方波和三角波，可单独产生时钟，不必借助硬件连接，包含寄存器程序，累加器程序和时钟发生电路等，以及顶层设计原理图-The DDS FPGA-based design, through an external DA converter output stable sine wave, square wave and triangular wave, can produce a single clock, without the help
-
-
0下载：
DDS的FPGA实现(VHDL),只可调频，调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
-
-
4下载：
信号发生器设计
信号发生器由波形选择开关控制波形的输出, 分别能输出正弦波、方波和三角波三种波形, 波形的周期为2秒（由40M有源晶振分频控制）。考虑程序的容量,每种波形在一个周期内均取16个取样点,每个样点数据是8位(数值范围:00000000~11111111)。要求将D/A变换前的8位二进制数据（以十进制方式）输出到数码管动态演示出来。-Signal generator design
The signal generator is controlled by waveform se
-
