搜索资源列表
threeflift
- 三层电梯控制器VHDL源程序,是本人的毕业设计-three VHDL source elevator controller, I was the graduate design!
VHDL_of_example
- 此 为 VHDL 的示例程序,由于最近毕业设计要求使用这个编程,自己收集并整理了一些,供学习使用,希望和大家共同进步,有兴趣的也希望能和我一起讨论交流-this as examples of VHDL procedures, due to the recent graduation design requirements using the program, their collection by some for learning, hope and common progress. Inte
DDs
- 这是我的毕业设计,是用VHDL编程的直接扩频发生器。
两路十字路口的交通灯控制的VHDL源码
- 两路十字路口的交通灯控制的VHDL源码,毕业设计,,Two-way traffic lights at the crossroads of the VHDL source code control, graduation design,
VHDLjiaotongdeng
- 有关毕业设计交通灯的VHDL设计,包括源码程序和仿真图形相关报告。-Traffic lights on the graduation project of VHDL design, including source code and simulation procedures related to the report graphics.
b
- 毕业设计中的12层电梯信号的控制程序VHDL-Graduation Design 12-storey elevator signal control procedures VHDL
FPGApinlvji
- 当年本科时的毕业设计,信号发生器和频率计-The time of the year undergraduate graduate design, signal generator and frequency counter
lunwenVHDL
- 毕业设计vhdl论文的先期工作。对于大学毕业设计论文有重要作用-Graduate design vhdl advance work papers. For the university graduation thesis plays an important role
85
- 逐次逼近的VHDL开平方算法,作者:QQ 64134703 ,电子毕业设计,欢迎咨询 -VHDL open square successive approximation algorithm, the authors: QQ 64134703, e-graduate design, please consult
DCmotor
- 给出了具体的基于FPGA的直流电机PWM控制VHDL程序,可用于毕业设计。-Given a specific FPGA-based DC motor PWM control VHDL program can be used to graduation.
shejishengjiangji
- 对电梯的基本功能进行了实现,并把电梯的一些特殊功能进行了改进,这是本人的毕业设计程序。-The basic functions of the elevator to achieve, and to lift some of the special features have been improved, this is my graduation project process.
FFT_report
- 印度一所大学的硕士研究生毕业设计:FFT处理器的的fpga实现-India, a masters graduate of the University of Design: FFT processor for fpga implementation
CRC
- 基于VHDL的CRC编解码器设计,非常好用的哈。我的毕业设计内容-The CRC VHDL-based codec design, very easy to use, ha. The contents of my graduation
VHDL-electronic-clock-design
- 毕业论文--基于硬件描述语言VHDL的电子钟设计-Thesis- VHDL hardware descr iption language based on the electronic clock design
traffic-light
- 使用VHDL编写的交通灯控制代码,可以用于课程设计或者毕业设计使用,已经经过调试运行正确-Using the VHDL code written in traffic light control, can be used for graduate design course design or use, has been commissioning the right
DDS
- 毕业设计,基于FPGA的DDS设计与实现模块-FPGA DDS
autosell
- VHDL语言的自动售货机,作为毕业设计与课程设计,已调试过了可以下载使用-VHDL language vending machine, you can download have been used to debug
vhdl
- 十六路彩灯控制系统,毕业设计相同题目的兄弟姐妹们可以参考一下-Sixteen path lights control system
TDM
- 运用VHDL实现十分多路复用,毕业设计来的,很清楚 ,希望对大家有用-matlab in Applied Communication Theory, TDM emulation, hope that we can useful!
fsk_tz
- vhdl实现FSK调制,本次毕业设计的数据速率 1.2kb/s,要求产生一个1.2kHz的正弦信号,对正弦信号每周期取100个采样点,因此要求产生3个时钟信号:1.2kHz(数据速率)、120kHz(产生1.2kHz正弦信号的输入时钟)、240kHz(产生2.4kHz正弦信号的输入时钟)。基准时钟已由一个外部时钟120MHz提供,要得到前面三种时钟,就需要首先设计一个模50的分频器产生240kHz信号,再设计一个二分频器,生产一个120kHz的信号,然后再前面的基础上再设计一个模100的分频器,