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rangewithverilog
- 采用冒泡排序的方式在verilog中实现，从而可以实现信号的有序输出，为控制设备提供有序信号。
lzm_bubble_soft
- 基于fpga实现的冒泡排序，初学者研究资料，希望更深一步的进行研究-Fpga-based implementation of bubble sort, beginners research data, hoping to study deeper
bubble_verilog
- 可综合的基于FPGA实现冒泡排序!资料仅供学习参考，包含tb文件-FPGA-based implementation can be integrated bubble sort! Information for reference purposes only to learn that contains the file tb
maopaofapaixu
- 基于飞思卡尔S12X的冒泡法排序（汇编语言编写）-Based on Freescale S12X the bubble sort method (assembly language)
MAOPAOFA(flag)
- 基于飞思卡尔S12X单片机汇编语言的冒泡法排序程序-Based on Freescale S12X MCU assembly language program bubble sort method