搜索资源列表
sdsource
- 这是一个用FPGA的IO口模拟SD协议的通信信号实现SD底层的读写程序，只要在FPGA上面定义SD的CLK和SDATA等信号，就可以完成SD的读操作
无线通信FPGA设计[田耘等编著][程序源代码matlab]
- 无线通信FPGA设计[田耘等编著][程序源代码matlab]
canbus
- 实现CAN总线的通信，并通过测试验证，用verilog在FPGA上实现-CAN bus communication, and tested to verify that, in the FPGA using verilog
Serial
- FPGA与PC串口通信的Verilog HDL 程序-FPGA and the PC serial communication procedures Verilog HDL
The-pulse-signal-generator
- 脉冲信号发生器：采用DDS技术实现脉冲信号的周期、脉冲宽度、幅值的数控调节。通过单片机与FPGA的并行通信技术将频率控制字及矩形脉冲数据传送给FPGA的双口RAM。模拟输出通道则将信号通过100MHz、8位D/A转换器将波形数据转换成模拟脉冲信号，最后通过高速运放构成的放大器放大，实现幅度连续可调。-The pulse signal generator: using the DDS technology to achieve the pulse signal cycles, pulse widt
ep2c35_5_3_ps2_keyboard_test
- 利用fpga来与键盘通信，ps/2协议，代码简洁可靠，实验验证可行-Use fpga to communicate with the keyboard, ps/2 protocol, code is simple and reliable experimental verification possible
RS232_PS2_Control
- Verilog语言编写的RS232控制模块以及RS232到PS2的通信接口模块。整个模块已经通过Virtex4的FPGA平台上的硬件仿真和验证。-Verilog HDL model for RS232 and PS2 interface communication control block. It includes the RS232 RX-TX model as well as PS2 model, and it have already been proven in FPGA virtex
CH376_CODE
- CH376 U盘控制芯片驱动，在FPGA的SOPC平台上调试的，也可以稍加修改就可用在单片机上，串口、SPI、并口三种通信接口选择。-CH376 U disk drive controller chip, the SOPC platform on FPGA debugging can also be slightly modified can be used on single-chip, serial, SPI, three parallel communication interface s
ADC0809
- 次VHDL代码实现FPGA与ADC0809的通信，通过ADC0809的模数转换功能转换为数字信号进入FPGA处理-Times FPGA VHDL code to communicate with the ADC0809, ADC0809 analog-to-digital conversion by function into the digital signal processing into the FPGA
DSP--PFPGA
- 在FPGA中编写FPGA芯片与DSP28335进行通信的程序-FPGA chip and DSP28335 written in FPGA communication program
Frequency-meter
- 本代码包含stm32单片机与FPGA两部分，通过FPGA实现频率、时间间隔以及相位差的测量并通过spi与stm32通信，在stm32上实现数据的运算与显示。-This code contains two parts stm32 MCU and FPGA, frequency, time interval and phase measurements and by spi communication with stm32, on stm32 achieve computing and displa