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CAN协议控制器的Verilog实现
- 基于FPGA的CAN总线控制器,VERILOGHDL源代码,Q2仿真实现。可用。-FPGA-based CAN Bus Controller, VERILOGHDL source code, Q2 Simulation. Available.
fpga-jpeg-verilog
- fpga-jpeg-verilog在fpga平台使用verilog语言进行jpeg算法实现
mydesign
- 自己做的毕业设计,任意波形发生器的原理图及pcb版图,基于mcu和FPGA实现的
基于FPGA的对于VGA实现全彩控制的程序
- 基于FPGA的对于VGA实现全彩控制的程序
FPGA简易3-8译码器
- QUARTUS II实现的简易3 8译码器
yongFPGAshixiansandianpingPWMfashengqi
- 用FPGA实现三电平PWM发生器的完整资料-Using FPGA to achieve three-level PWM generator complete information
sd_MP3
- SD卡作为存储器,FPGA作为处理器,sta013作为解码芯片,实现mp3播放,文件系统为fat16-SD memory card as, FPGA as a processor, sta013 as a decoder chip, the realization of mp3 player, file system to fat16
ethernet
- :提出了一种基于FPGA 实现嵌入式三态(10MB/100MB/1 000MB)以太网的设计方案,分别从硬件和软件方面介绍了使用FPGA 进 行嵌入式系统设计的方法,编写了一个控制系统进行10MB/100MB/1000MB 自切换程序,并在工程中得以实现。-: This paper presents a FPGA-based Embedded Tri-State (10MB/100MB/1 000MB) Ethernet design, from hardware and software,
FPGALCD
- FPGA控制LCD128*64程序,时序已仿真引脚锁定,并在硬件能够上实现汉字显示。-FPGA control LCD128* 64 procedures have been timing simulation, and hardware to achieve display of Chinese characters.
20090903FPGA
- 本文论述并设计实现了一个脱机自由手写体数字识别系统。文中首先对待识别数字的预处理进行了介绍,包括二值化、平滑滤波、规范化、细化等图像处理方法;其次,探讨了如何提取数字字符的结构特征和笔划特征,并详细地描述了知识库的构造方法;最后采用了以知识库为基础的模板匹配识别方法,并以MATLAB作为编程工具实现了具有友好的图形用户界面的自由手写体数字识别系统。实验结果表明,本方法具有较高的识别率,并具有较好的抗噪性能。-In this paper, designed and implemented an o
lzm_bubble_soft
- 基于fpga实现的冒泡排序,初学者研究资料,希望更深一步的进行研究-Fpga-based implementation of bubble sort, beginners research data, hoping to study deeper
bubble_verilog
- 可综合的基于FPGA实现冒泡排序!资料仅供学习参考,包含tb文件-FPGA-based implementation can be integrated bubble sort! Information for reference purposes only to learn that contains the file tb
FPGA-multi-purpose-function-signal
- 基于FPGA的多功能函数信号发生器:基于FPGA实现直接数字频率合成,该函数信号发生器可以实现正弦波、三角波、方波、锯齿波等多种波形输出,输出信号的频率和幅度可调,利用单片机完成整个电路的时序控制、数据处理和实时显示输出。-Based on FPGA multi-purpose function signal generator: based on FPGA realizing direct digital frequency synthesis, this function signal ge
DDS-Waveform-generator
- 采用FPGA实现的DDS波形发生器源码,可以实现频率幅值变换、正弦波、方波、三角波输出,输出频率可达1MHz-FPGA implementation of the DDS waveform generator source frequency amplitude transform, sine wave, square wave, triangle wave output, the output frequency up to 1MHz
FPGA-new-dso-project
- 自己开的示波器FPGA代码,可以实现示波器的DIY-scope FPGA code
danweishumaguan
- 用FPGA实现单位数码管显示,日期显示,前翻后翻,依次显示。-Units with FPGA digital display, date display, before the turn after turn, followed by display.
FIRverilog
- 多种FIR滤波器的verilog语言实现 (数字信号处理的FPGA实现)-Verilog language variety FIR filter implementation (digital signal processing FPGA implementation)
DDS
- FPGA实现DDS波形发生器,多种信号的产生,-FPGA realization of DDS waveform generator to produce a variety of signals,
FIR32
- 基于DA算法的FIR带通滤波器设计,应用于FPGA实现,verilog语言描述-DA algorithm based on FIR bandpass filter design, used in FPGA implementation, verilog language to describe
ad9226
- ad 9226 数据采集芯片的 FPGA 实现,FPGA 对数据的采集准确,通过仿真和实测(The FPGA implementation of ad9226 data acquisition chip,FPGA data acquisition accuracy, through simulation and measurement.)