搜索资源列表
PLL
- LPC2114平台，验证锁相环功能，并通过proteus仿真-LPC2114 platform, validation and phase lock loop function, and through the proteus simulation
digitai-signal
- 基于FPGA的锁相环，可用于提取同步信号-FPGA based phase lock loop, which can be used to extract the synchronous signal