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dpll
- 数字锁相环 dpll的 编译通过,使用verilog HDL语言对锁相环进行基于FPGA的全数字系统设计,以及对其性能进行分析和计算机仿真的具体方法-Digital phase-locked loop dpll compiler through the use of verilog HDL language on the phase-locked loop FPGA-based digital system design, as well as its performance analysis
AD9226_acq
- 运用verilog语言实现芯片AD9226的传输-Using verilog language to achieve the transmission of chip AD9226
spi
- 使用verilog语言实现spi传输协议(Using Verilog language to implement SPI transport protocol)
SystemVerilog 3.1a中文+英文版
- Sytem Verilog 语言的设计事项(SystemVerilog user Guide)
计数器
- 简单的硬件描述语言verilog语言描述的128进制计数器。(Simple hardware descr iption Language Verilog language described 128 binary counter.)
xiaodou
- 利用Verilog语言进行编写的V代码，实现的按键消抖功能(The V code written in Verilog language is used to realize the function of button dithering.)