h.264(verilog HDL) 这是基于流水线结构的H.264解码器源码-h.264 (verilog HDL) which is based on the pipeline structure of the H.264 decoder source code

通过Verilog程序在FPGA上实现按键切换的亮度变化。包含源代码和原理图-Verilog program achieved through changes in brightness button to switch on the FPGA. Contains the source code and schematics