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djpeg_vlsi
- jpeg解码电路，是verilog编写的，可以综合，很有实用价值。-jpeg decoder circuit, is prepared verilog, synthesis, very practical value.
H264
- h.264(verilog HDL) 这是基于流水线结构的H.264解码器源码-h.264 (verilog HDL) which is based on the pipeline structure of the H.264 decoder source code
dvi-code-verilog
- dvi encoder and decoder for fpga