VHDL DDS 采用FPGA实现1hz到100khz可调的dds程序,频率调节步长是变化的。-Using FPGA 1hz to 100khz adjustable, dds program, the frequency adjustment step change.

基于fpga的DDS实现,可以实现1hz-40Mhz的正弦信号，方波信号，锯齿波信号，三角波信号等的输出-DDS fpga-based implementation can be achieved 1hz-40Mhz sine signal, square wave signal, sawtooth signal, the output of the triangular wave signal, etc.