搜索资源列表
Xilinx-FPGA-Matlab-Simulate
- Xilinx-FPGA-Matlab-Simulate.rar
HDB3
- HDB3码的编码，图形，功率谱密度。用于通信原理教学等-Code HDB3 coding, graphics, power spectral density. Communication Theory for teaching
filter
- 这是基于MATLAB下的XILINX的FPGA的FIR滤波器的模型设计文件-This is a MATLAB-based FPGA of the XILINX Model of the FIR filter design documents
arithmetic
- 这是xilinx的FPGA实现各种算数运算的全部基于MATLAB的模型文件，包括加减乘除等-This is the xilinx arithmetic FPGA to achieve the full range of MATLAB-based model of documents, including multiplication and division, such as addition and subtraction
ASK-OOK-FSK-BPSK
- MATLAB实现ASK, OOK, FSK, BPSK, QPSK, 8PSK调制源代码-Free Source Code for ASK, OOK, FSK, BPSK, QPSK, 8PSK Digital Modulation in FPGAs Xilinx using system generator (ASK, BPSK, FSK, OOK, QPSK)
XILINX
- not so good BPSK software matlab
sysgen_gs
- Xilinx system generator的上手指南，system generator用于在matlab中使用simulink设计硬件，很方便-guide of system generater by Xilinx
pc_cfr_v2_0_msim_r2_0
- Xilinx公司pc_cfr IP核的MatLab仿真-matlab simulation model of pc_cfr ip core of xilinx
cdma2k_ddc_12_1
- matlab simulink 开发的CDMA2K DDC数字下变频器和滤波器，使用XILINX FPGA V5系列，并包含DDC每个阶段的输出验证matlab程序，非常实用。-matlab simulink developed CDMA2K DDC digital down converter and filter, using the XILINX FPGA V5 series, and contains the output of each stage of verification DD
makecoe
- matlab生成*.COE文件，用于xilinx公司FPGA内部存储器的初始化文件-matlab generate*. COE file for xilinx FPGA internal memory company initialization file
fir_cic
- 用matlab生成xilinx FIR参数，对其FIR 核进行配置-Matlab generate xilinx FIR parameters to configure their FIR
New-Folder-(2)
- 基于matlab simulink的仿真程序 使用xilinx芯片设计的嵌入式系统-embedded system matlab simluink xilinx
ROM_GENERATOR
- 用matlab生成xilinx波形文件即coe文件。-Using matlab to generate the the xilinx waveform file.
lab2
- MAC implementation Using Xilinx System Generator for matlab
mycoe
- 线性调频信号脉冲压缩 用matlab生成coe文件以导入xilinx fpga -Chirp signal pulse compression using matlab generated COE file to import xilinx fpga
DDS
- 直接数字合成(DSS)的matlab仿真,采用simulink和Xilinx的system generator工具开发-simulink for DSS, the development tool is the system generator by Xilinx and simulink
Gps-receiver-using-xilinx-fpga-and-ti-dsp-in-matl
- Gps receiver using xilinx fpga and ti dsp in matlab
LMS filter
- lms filter on verilog filter and synthesizable on xilinx
Lab1
- Lab for system generator from xilinx
Lab1_1_sol.slx
- solution TP 1 proposed by xilinx