搜索资源列表
rs-code
- 基于PLD的RS码编译码器设计，用VHDL语言编写，编译通过，测试结果正确。
automatic-elevator
- 使用VHDL语言编写的基于FPGA的自动升降电梯控制器-VHDL language using FPGA-based controller of automatic elevators
suber
- 一位全减器的VHDL语言的实现，用两个半减器实现全减器功能-A full-reducing device implementation of VHDL language, using two and a half to achieve full device functionality by
qpsk_relate
- QPSK解调机设计,采用相关解调,用硬件语言verilog描述-QPSK demodulation machine design, using the relevant demodulation, using the hardware descr iption language verilog
qam_64
- 64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核-64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS
led
- 利用VHDL语言完成LED显示基本功能，并且补充了一些特殊功能-LED display using VHDL language to complete basic functions, and added some special features
Decimal-Counter
- 十进制计数器（异步置数）及七段数码管显示系统，VHDL语言-Decimal Counter (Asynchronous Set the number) and the seven-segment LED display system, VHDL language
FPGA-based-realization-of-OFDM
- 基于FPGA的OFDM实现,用VHDL语言编写的。-FPGA-based realization of OFDM
ipfiltersingletb
- 此程序是用vhdl语言编写的多相滤波器。使用了ip核。并且配有测试程序，是正确的。-This program is a polyphase filter vhdl language. Use the ip core. And with a test program, is correct.