异步fifo在IC设计中，非常重要；是异步时钟域同步方法-Asynchronous fifo in IC design, is very important are asynchronous clock domain synchronization

同步FIFO设计源代码，带有复位信号的同步FIFO设计，能够在同一个时钟域范围内写入读出数据，从而做到传递数据的功效。-Synchronous FIFO design source code, synchronous FIFO design with a reset signal, can write and read data in the same clock domain range, so do efficacy data transfer.