该项目的目的是设计和实施，为的沟通通过其JTAG接口和控制是通过设置断点和寄存器和存储器访问程序的执行能力ATmega644调试。-The purpose of this project was to design and implement a debugger for the ATmega644 that communicated through its JTAG interface and was capable of controlling program execution by se

High performance 32-bit/40-bit floating-point processor Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs Single-instruction multiple-data (SIMD) computational architecture— two 32-bit IEEE floating-point

program jtag chip using simulated print port. this file include definition of how to map hardware pin to a chip jtag port.