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syn_rd_wr_fifo
- 该代码实现了FPGA对USB芯片68013的读写,语言是VERLOD,试验通过。-The code to achieve the FPGA read and write 68013 on the USB chip, the language is VERLOD, through the test.
nexys4-ddr_sw_demo
- The Nexys4 DDR board is a complete, ready-to-use digital circuit development platform based on the latest Artix-7™ Field Programmable Gate Array (FPGA) Xilinx® . With its large, high-capacity FPGA (Xilinx part number XC7A100T-1CSG324C)