an implementation of fft 1024 with cos and sin generated by matlab.

vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project

i m sending hdl code of dm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.-i m sending hdl code of ofdm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.