This project allows you to learn communication systems in greater depth. It contains the Simulink files (*.mdl) which are block design files of various communication systems such as AM, DSB-SC, FM, PLL, Data Acquisition, Digital Data Transmission, PC

基于matalab simulink中dspbuider实现am调制，将mdl文件转化为vhdl文件，在quartus2里面进行下载验证,Matalab simulink based on the realization of dspbuider modulation am to mdl file into vhdl file, download it in quartus2 authentication