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dmf_pn_catch
- 采用匹配滤波，实现伪码捕获功能，模块内部可以产生简单噪声来验证捕获性能(verilog)
IIR_Filter_8
- verilog实现8阶的iir滤波器。对于刚学习verilog的朋友来说是一个易懂的学习资料。-verilog order to achieve the iir filter 8. For just learning verilog friend is a easy to understand learning materials.
Midian_fpga
- 图像处理中用到的中值滤波，FPGA实现。verilog语言。-Used in image processing median filter, FPGA implementation. verilog language.
filter
- 数字滤波器的verilog语言程序，为双精度的滤波器，可以实现10k低通滤波-verilog filter