搜索资源列表
asyn_fifo
- verilog编写的异步fifo源代码,asyn_fifo.v为顶层,调用其他四个文件-asynchronous fifo prepared Verilog source code, asyn_fifo.v for top-level, call the other four documents
FIFO
- 利用Verilog实现了一个FIFO,包含几个模块文件,适合初学Verilog的朋友,含测试代码。-Verilog achieved using a FIFO, a document contains several modules, suitable for novice Verilog friends, including test code.