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VIT2.1.6
- viterbi 编译码器C源程序，rate=1/2 N=7-Viterbi Decoder C source, rate = 1 / 2, N = 7
turbo_VHDL
- Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * MyHDL cycle/bit accurate model * Synthesizable VHDL model -Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * M
viterbi_decoder_for212
- 本程序为（2，1，2）维特比译码程序，采用对BIT操作，译码速度特快，可扩展至(2,1,6)-viterbi decoder for(212) convolutional
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- 卷积码维特比译码器设计输出完整电路进行误码率分析-Convolutional code Viterbi decoder integrated circuit design of the output bit error rate analysis
vitdec
- viterbi decoder. it implements viterbi decoder
convolution
- implementation of viterbi decoder
survivors-management-in-viterbi
- viterbi解码器中幸存路径的管理，比较了几种不同的算法。-viterbi decoder in the management of the surviving path, comparing several different algorithms.