搜索资源列表
FIRFIR1
- 基于FPGA的FIR串行滤波器设计与实现，本文运用VHDL编写-FPGA-based FIR filter design and implementation of the serial, the paper prepared by the use of VHDL
test
- verilog实现循环计数器，8位的计数器，可使用在各类FPGA平台中-a loop counter designed by verilog
tst6
- FPGA 电子琴音乐演奏器。使用频率计，计算音乐谱的不同发音，用蜂鸣器发音，实现音乐演奏。-FPGA keyboard music player. Frequency meter, calculate the different pronunciation of the musical spectrum, buzzer pronunciation, the music played.
8.4-ADC0809-
- 基于VHDL语言，实现对ADC0809简单控制,ADC0809没有内部时钟，需外接10KHz~1290Hz的时钟信号，这里由FPGA的系 --统时钟（50MHz）经256分频得到clk1（195KHz）作为ADC0809转换工作时钟。 -Based on VHDL ADC0809 simple control, ADC0809 no internal clock, an external clock signal of 10KHz ~ 1290Hz here by the Departm
crc16_8bit.v
- FPGA用于实现crc16编码的verlog源程序，用到的请下载。-FPGA is used to achieve the the crc16 the encoding of verlog source code used to download.
MSK-Verilog
- mak调制的fpga实现程序，基于fpga的vl文件，很好用，实用-mak modulation of fpga implementation procedures based fpga vl file, useful, practical
Midian_fpga
- 图像处理中用到的中值滤波，FPGA实现。verilog语言。-Used in image processing median filter, FPGA implementation. verilog language.
69963930CORDIC
- cordic的fpga实现，基于verilog硬件语言实现，实现高速流水线的CORDIC。-cordic fpga implementation, hardware-based verilog language, to achieve high-speed pipelined CORDIC.
alu16
- 16位运算器，用实例化模块链接，是采用Verilog hdl编程，是实现fpga的代码-16-bit arithmetic unit, with links to instantiate module is using Verilog hdl programming, is to achieve the fpga code
sn74181
- 4位运算器采用sn74181，是采用Verilog hdl编程，是实现fpga的代码，实现了其模块的48种功能，-4 operator uses sn74181, is the use of Verilog hdl programming, is to achieve the fpga code, achieved its module 48 kinds of functions,
md
- 曼彻斯特编码的实现，Verilog模型。测试通过-FPGA Verilog Module.
CORDIC
- 基于FPGA的实现CORDIC算法的实现，本算法是Verilog语言编写的-FPGA implementations achieve CORDIC algorithm, the algorithm is the Verilog language
cordic_verilog
- FPGA实现cordic算法计算sincos-cordic for sincos
w3_OFDM_ReferenceDesign_v18p1
- FPGA实现的OFDM物理层的.最新发布的802.11参考设计提供了类似功能的OFDM参考设计，但可以用标准的802.11设备的互操作。-FPGA implementation of the OFDM physical layer.the newly released 802.11 Reference Design provides similar functionality as the OFDM Reference Design, but can inter-operate with sta
my-project3
- 主要是通过用fpga实现，频率的测定，具体的工程和仿真在里面都有包括。-Mainly through the use fpga implementation, measurement frequency, specific engineering and simulation which has included.
exm_opencl_fft1d_x64_windows_14.11
- SOC-FPGA实现并行FFT计算的程序-SOC-FPGA implementation of parallel FFT computing program
mult88
- 两个8*8矩阵相乘，每个矩阵内部元素相同，简化运算；modelsim编译仿真，ise或vivado下载，实现FPGA显示。(Two 8*8 matrix multiplication, each element of the same matrix, simplifying the operation; Modelsim compiler simulation, ISE or vivado download, to achieve FPGA display.)
基于FPGA的深度学习加速器设计与实现
- 基于FPGA的深度学习加速器设计与实现，帮助你增加对深度学习的理解，而且作为中文，很适合国内学者。(Design and implementation of deep learning accelerator based on FPGA)
基于FPGA改进粒子群优化算法
- 利用权重和差异演化来改进PSO 并在FPGA中实现(Using weight and difference evolution to improve PSO and implement in FPGA)
altera_opencl
- 该资料主要介绍用opencl在fpga平台开发，实现并行加速(This information mainly introduces the development of OpenCL on the FPGA platform to achieve parallel acceleration)