基于FPGA的串行通信UART控制器，采用VHDL语言编写，包含多个子模块。 在ISE或FPGA的其它开发环境下新建一个工程，然后将文档中的各个模块程序添加进去，即可运行仿真。源程序已经过本人的仿真验证。-FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new

本人学习VHDL经验的总结,其中包括了本人从学习VHDL开始到现在遇到过的所有问题及其解决方法以及在其他地方看到过的所有个人觉得经典的经验技巧,拿出来与大家分享 -learning experience in VHDL, These include the VHDL I learn from the beginning up to now faced all the problems and their solutions, as well as in other places seen a