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cpu-16-vhdl
- 16位cpu的vhdl源代码。 自己看看，没有注释。-16 cpu vhdl the source code. See for yourself, not Notes.
elevator
- 基于VHDL程序设计电梯的状态机.共六层的电梯有16个输入.其中包括5个上升,5个下降和六个电梯内的控制部分.
DCM
- Xilinx公司诸多型号开发版中的一个模块，能够实现1到16次倍频和分频等功能。使用时现在ISE集成开发环境下利用VHDL进行例化。本文档为个人学习总结-Xilinx, a number of models developed version of a module, be able to achieve 1-16 times multiplier and divider functions. ISE now use integrated development environment for
uart16bitloopback
- this is a implementation of the 16 bit loop back in vhdl
CRC
- 本文提出一种通用的CRC 并行计算原理及实现方法,适于不同的CRC 生成多项式和不同并行度(如8 位、16 位、及32 位等) ,与目前已采用的查表法比较,不需要存放余数表的高速存储器,减少了时延,且可通过增加并 行度来降低高速数传系统的CRC 运算时钟频率.-In this paper, a universal principle of CRC and implementation of parallel computing methods for generating differ
ALU16bit
- design ALU 16 bit in VHDL
Copy-of-VHDL-implementation-of-an-optimized-8-poi
- The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input datais a vector of 16 complex values
EDA-technology-and-VHDL-design
- 基于飞思卡尔智能车16位单片机的EDA技术和VHDL设计 编程方法和代码 -Based on Freescale 16-bit microcontroller design EDA technology and VHDL programming methods and code
Vhdl-Implementation-of--Fast-32x32-Multiplier-Bas
- The Vedic mathematics is quite different from conventional method of multiplication like adder and shifter. This mathematics is mainly based on sixteen principles. The multiplier (referred henceforth as Vedic multiplier) architecture base
ALU
- VHDL ALU功能的实现，包括16中运算，算术运算和逻辑运算-VHDL ALU functions are implemented, including 16 operations, arithmetic and logical operations
fft16vhdl
- 用quartus2 9.0写的vhdl 16点fft，每个模块用 vhdl语言描述，最后用电路图形式连接， 我同学也改成32点 8 点的 ，若 有问题 请plklklklkl@sina.com 包里边 还有 自己课设的文档啊 。-fft16 vhdl quartus2 9,0
vhdlquartusfft16
- fft16 点， quartus2 9.0 用vhdl编写各个模块，然后用电路图形式连起来 如有问题 plklklklkl@sina.com 里边还有 报告-ffft 16 quartus
Counter
- 通过VHDL编程，在FPGA上实现计数器1至16的计数功能-Count from 1 to 16 by VHDL on FPGA
xinputemu3
- level. (1)F 250nm cmos models, which can be u The bare metal of the Red Bull de UMC 90nm design kit. please read Light control to write their own Matlab-based lossless coding deco program to interface RFID with 16 vectors_array
lcd
- vhdl code fpga for lcd 2*16