搜索资源列表
I2CAnalyzeReport
- XILINX IIC总线设计分析 我的实验报告-XILINX IIC bus design and analysis of the report I
Virtex.files
- 在FPGA系统设计中，要达到性能最大化需要平衡具有混合性能效率的元器件，包括逻辑构造(fabric)、片上存储器、DSP和I/O带宽。在本文中，我将向你解释怎样能在追求更高系统级性能的过程中受益于Xilinx® 的Virtex™ -5 FPGA构建模块，特别是新的ExpressFabric™ 技术。以针对逻辑和算术功能的量化预期性能改进为例，我将探究ExpressFabric架构的主要功能。基于实际客户设计的基准将说明Virtex-5ExpressFabric技术性能平
Xilinx_ISE_chinese
- Xilinx ISE的中文教程,十分易懂,包你学会,当初我就是靠这个学的-Xilinx ISE Chinese guides, very easy to understand, including the Institute of you, when I was on the school
cpld_applications_handbook_I
- Xilinx handbook for CPLD applications, featuring CoolRunner-II and XC9500XL CPLDs - Part I
Assignment-3
- Assignment 3 Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption styles, i.e., behavioral, dataflow and structural descr iptions. (1) Synthesize and (2) simulate these models respectively in the environment of Xilinx I
dds_key-feature
- dds key feature in this file i explain key feature of dds xilinx core.
ME-Project-Reference
- This project used code verilog to load on Kit Xilinx Spartan 3A. Wireless Sensor Nodes Processor Architecture and Design.I prefered on the internet
sha1_v01
- sha1_testbench.v -- Testbench with vectors NIST FIPS 180-2 sha1_exec.v -- Top level sha1 module sha1_round.v -- primitive sha1 round dffhr.v -- generic parameterizable D-flip flop library Performance Analysis Performance equa
xilinx-idea-vhdl-master
- here I send VHDL code for IDEA algorithm