自适应数字滤波器中乘法器的硬件设计，用VHDL语言实现自适应数字滤波器。-Adaptive digital filter in multiplier hardware design, using VHDL language adaptive digital filter.

用VHDL语言设计基于FPGA器件的高采样率FIR滤波器,基于VHDL与CPLD器件的FIR数字滤波器的设计-Design using VHDL language FPGA devices based on high sampling rate FIR filter, based on VHDL and CPLD devices, the design of FIR digital filter

　 设计了一种采用VHDL 语言实现的应用于扩频通信捕获的数字匹配滤波器,并对其捕获性能进行了分析,这为扩频信号处理芯片的设计提供了新的机遇.-Designed an implemented using VHDL language used in spread spectrum communication to capture the number of matched filter, and its capture performance is analyzed, which is sprea

FIR数字滤波器设计，用VHDL来实现，用quarsII软件实现其功能-FIR FILTER vhdl