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Hi-tech_PICC9.50.rar
- 软件简介：HI-TECH PICC 是一款高效的C编译器，支持Microchip PICmicro 10/12/14/16/17系列控制器。是一款强劲的标准C编译器，完全遵守ISO/ANSI C，支持所有的数据类型包括24 and 32 bit IEEE 标准浮点类型。智能优化产生高质量的代码。属于第三方开发工具。能和MPLAB整合，内嵌开发环境（HI－TIDE）。 Hi-tech PICC Compiler v8.注册码 Serial: HCPIC-88888 First Na
IEEEstarderdata
- IEEE标准节点电力系统潮流计算测试用，包含所有节点数据-IEEE standard node test power system load flow calculation, the data contains all nodes
10-da--suanfa
- 讲述了最著名的十大数据挖掘算法，经典资料，国际权威的学术组织the IEEE International Conference on Data Mining (ICDM) 2006年12月评选出了数据挖掘领域的十大经典算法：C4.5, k-Means, SVM, Apriori, EM, PageRank, AdaBoost, kNN, Naive Bayes, and CART.-About the top ten most famous data mining algorithms, the
IEEEdata3
- IEEE节点测试数据大全，很全面的资料，参考价值大-The IEEE data Guinness, comprehensive information
01410291
- data mining IEEE paper with bottom up generilazaiton
ENC28j60_f-data-sheet
- ENC28J60_f .data sheet . Stand-Alone Ethernet Controller with SPI Interface. IEEE 802.3 compatible Ethernet controller.Integrated MAC and 10BASE-T Supports Full and Half-Duplex modes. SPI Interface with clock speeds up to 20 MHz.
1
- 大规模跨媒体数据收集 大规模 跨媒体 数据收集 IEEE论文-Large-scale cross-media data collection of large-scale cross-media data collection IEEE
IEEEbiaozhunceshixitognshuju
- IEEE标准测试数据及结果，希望对大家有所帮助-IEEE standard test data and results
feeder4_IEEE
- IEEE 4 nodes feeder test data
14_appendices-1-to-4
- This IEEE 24-Bus RTS data are taken from http://www.ee. washington.edu/research/pstca. The line data and bus data are given in Table A1.1 and A1.2
case24_ieee_rts
- CASE24_IEEE_RTS Power flow data for the IEEE RELIABILITY TEST SYSTEM Please see help caseformat for details on the case file format. This system data is from the IEEE RELIABILITY TEST SYSTEM, see IEEE Reliability Test System Task Fo
16machine68bus
- 电力系统仿真数据，经典ieee的68节点系统潮流文件-Power system simulation data, the classic 68-node system ieee trend file
14-bus-simulink
- 14 BUS SYSTEM IEEE TEST DATA
ICSEG-Power-Case-1---IEEE-300-Bus-Systems
- Data IEEE300-bus-system. Simulation in Power World program.
verilog-ieee
- The Verilog ¤ Hardware Descr iption Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it
10.1.1.402.4806
- 基于小波变换的图像压缩，外文IEEE资料。-Image compression wavelet transform data based on IEEE foreign language
case13659pegase
- 13659 IEEE BUS SYStem data