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process-simulation
- 20多个FPGA设计实例(程序+仿真图),包含LED控制,LCD控制,出租车计价器VHDL程序与仿真,波形发生程序,步进电机定位控制系统VHDL程序与仿真等等,VHDL语言编译。-More than 20 instances of FPGA design (process+ simulation map), contains the LED control, LCD control, taxi meter VHDL procedures and simulation, waveform proc
vhdl
- library ieee use ieee.std_logic_1164.all entity decoder is port (clk:in std_logic clr:in std_logic data_in:in std_logic --待解码信元输入端; data_out:out std_logic) --解码信元输出端; end decoder architecture behave of decoder is component dff2