IR Drop Analysis and Timing-Function Model Generation for Embedded FPGA(I).

in this part of source code i added the code for interface the rs-232 with pc and connected it to the fpga spartan-3e in order to transmit data and receive it -in this part of source code i added the code for interface the rs-232 with pc and conne

基于FPGA的SDRAM读写驱动的源代码，多年收集的，希望对大家有帮助-FPGA-based SDRAM read and write driver source code, collected over the years, and I hope to help everyone

在学习verilog 中与遇到一些列问题的整理。-this Documentation is about the problem about verilog which is meeted when i was learn FPGA