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Verilog-to-do-SD-card
- 本文档内是基于Verilog HDL的SD卡SPI模式下的读写程序，内有详细的注释，且通俗易懂。-This document is based on Verilog HDL in the SD card in SPI mode to read and write procedures, which are detailed notes, and easy to understand.
MPEG2_TS_flow_embeded_control_data_design
- MPEG2_TS_flow_embeded_control_data_design.doc格式的有verilog程序！-MPEG2_TS_flow_embeded_control_data_design.docformat verilog program inside！
Verilog-HDL-standard
- VERILOG的编码设计规范，使你的程序容易被理解，阅读和维护-VERILOG coding design specifications, to make your program easier to understand, read and maintain
ps2
- verilog PS2键盘解码程序， 之前探讨过PS/2键盘编解码以及数据传输协议，这次自己动手实现了利用FPGA接收键盘编码，然后通过串口传输到PC。做的比较简单，只是通过FPGA把大写字母A-Z转换成相应的ASCII码，只要字母按键被按下，就能在串口调试助手里显示相应大写字母。下面就共享代码吧！ 除了顶层模块，三个底层模块分别为PS/2传输处理模块、串口传输模块以及串口波特率选择模块（下面只给出顶层模块和PS/2传输处理模块的verilog代码）。-verilog PS2 Ke
pay-verilog
- 出租车计价器程序代码，硬件描述语言，VHDL—verilog-chuzuche meter，VHDL—verilog
Motor.asm
- 基于verilog HDL步进电机驱动程序-The verilog HDL stepper motor driver
filter
- verilog—FIR滤波器程序，可移植性强，可以借助FDAtool设计滤波器系数，写到本程序里即可-verilog-FIR filter process, portability, and can make use of FDAtool design filter coefficients, the program can be written to
dianzhen
- 如果需要用verilog设计一项比较简单的功能，那么这个浅显易懂的程序能让你很快明白点阵的设计方法，尤其是对那些初学者-If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those w
LED
- 四种亮灯方式自由切换的跑马灯程序，若想在最开始就体会到学习verilog的乐趣，那就先学习跑马灯程序吧-Marquee program four free switching of lighting the way, if you want to appreciate at the very beginning of learning verilog fun it would be to learn Marquee program
verilog2014
- verilog数字系统设计教程的教学ppt，包括基础知识，还有一些程序可供参考使用。-Verilog Teaching Digital System Design Tutorial ppt
18.uart
- 用Verilog HDL编写的uart程序，亲测可行，注释很详细！-Written using Verilog HDL uart program, pro-test is feasible, very detailed notes!
key-scanning
- 该程序是基于FPGA的verilog语言的编程，用于检测硬件中的3×3按键的状态信息-The program is a programming language for FPGA-based verilog for status information to detect hardware buttons 33
scan-led
- 7段共阳极数码管，译码显示，Verilog HDL程序-Code based on Verilog HDL
shizhong
- 基于Verilog HDL语言的数字时钟程序，有秒脉冲，，计数，译码显示等部分-based on Verilog HDL language,about clock
FPGA-design-of-wavelet-filter
- 基于Verilog的小波滤波器程序设计的总结文档。-Verilog based wavelet filter program design summary document.