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This paper is focus on to implement IEEE 802.3 XMAC transmitter using different VHDL coding techniques. We propose consequences of VHDL coding styles on area utilization and speed. Optimization for maximum speed can be achieved by FSM based app

The Vedic mathematics is quite different from conventional method of multiplication like adder and shifter. This mathematics is mainly based on sixteen principles. The multiplier (referred henceforth as Vedic multiplier) architecture base