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sourcefile
- 在Altera公司的Cyclone系列FPGA开发板上试验的按键中断程序，希望对那些学习中断开发的初学者有帮助。 pio_key.v是verilog编写的按键中断程序，对应四个按键，按其中任何一个键都可以发送一个中断； keyint.c是Nios中编写的C程序，用于检测按键的中断，如果检测到中断，会检测是哪个按键按下，从而执行相应的程序！ -In Altera' s Cyclone series FPGA development board interrupt key test
cyclone5_handbook
- Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements and the increasing bandwidth requirements for high-volume and cost-sensitive applications. The Cyclone V de
Alrera-FPGA-SOC-Cyclone-V
- Alrera FPGA SOC Cyclone V 官网开发板调试记录-Alrera FPGA SOC Cyclone V official website development board debug log
uCOS-II-Cyclone-V-SoC
- 应用在ALTERA FPGA芯片的UCOS开发板实现代码,从micrium官网下载-μC/OS-II Example for the Cyclone V SoC Development Kit
br-soc-fpga
- cyclone v的altera公司的带arm硬核的soc设计指南-cyclone v the product of altera with the arm hard process cores introductiong
FIFO_altera.v
- FIFO for Altera Cyclone II or Cyclone III on memory blocks. Length of FIFO can be changed.
altera-soc-cyclone-V
- 针对altera公司的soc平台的开发流程，适用于友晶cyclone v SOC开发板。-Altera soc platform for the company' s development process for Terasic cyclone v SOC development board.
DE1_SoC_Audio
- 声音录制、播放的Verilog代码，用于Altera Cyclone V SOC. 写时适配的是DE1-SOC开发板。-Audio recording and playing code for Altera Cyclone V SOC FPGA. Code was designed for DE1-SOC development board, but could be reference for other boards.
Altera-Cyclone-V-Memory
- Altera Cyclone V FPGA中的高效能硬核Memory控制器-Altera Cyclone V FPGA ddr3 Memory control
PCIE_quartus13.1_tutorial2
- altera pcie avalon MM PCIE硬核仿真教程，器件Cyclone V，不同于教程1-avalon MM pcie sim tutorial，device Cyclone V，
C5_SOC_DEVKIT_E
- altera Cyclone V SOC开发板原理图-schematic of altera Cyclone V SOC Demo
CLOCK
- 实现电子钟，连接数码管显示，手写原创，使用CYCLONE V ，已经验证成功，附上工程文件-Implement electronic clock, use CYCLONE V, has been successfully verified, attach the project file
LSD
- 用VHDL语言写的流水灯，适用于最新的CYCLONE V 实验环境，工程文件附上，管脚分配已经完成。需要实验书可联系2942551049@qq.com-VHDL language used to write the water lights for the latest CYCLONE V test environment, engineering documents attached, pin assignment has been completed. Experiments need to
liushuideng
- Cyclone V开发实验板实现FPGA的8位流水灯(Cyclone V development of experimental board to realize 8 bit flow lamp of FPGA)
FPGAstudy
- CYCLONE V实现按键对LED灯的控制(CYCLONE V control the control of LED lamp)
miaobiao
- Cyclone V开发板实现数字秒表功能，带有启动，暂停，复位功能。可以显示小时，分钟，秒。(Cyclone V development board implements digital stopwatch function, with start, pause, reset function. It can be shown hours, minutes, seconds.)
C5中文说明手册
- cyclone v中文说明手册 使用说明书(Cyclone V Manual of Chinese instructions)
C5GX开发板原理图和PCB
- Altera_Cyclone V GX FPGA Development Kit原理图PCB 供参考(Altera_Cyclone V GX FPGA Development Kit_sch_pcb)
elevator
- 八层电梯，有密码开关，警报开关，quartusⅡ综合，cycloneⅤ的板子(There are password switches, alarm switches, and eight layers of elevator display, Quartus II synthesis, cyclone V board.)