搜索资源列表
FPGA
- 结合FPGA和以太网传输的特点，设计了一套数据采集系统，应用FPGA的内部逻辑实现对ADC、SDRAM、网卡控制芯片DM9000的时序控制，以FPGA作为采集系统的核心，通过ADC，将采集到的数据存储到SDRAM中，以FIFO方式从SDRAM中读出数据，并将数据结果通过以太网接口传输到计算机-Combination of FPGA and Ethernet features, designed a data acquisition system, application FPGA' s i
DM9000A.VerilogHDL
- 用VerilogHDL语言实现的DM9000A控制器的代码,是用FPGA做SOPC的重要组成部分-VerilogHDL language used to achieve code DM9000A controller is the use of FPGA to do an important part of SOPC
SOCKET
- 基于de2开发板与pc机之间传输的实验，有详细的实验步骤和全面的资料，socket程序-De2-based development board and transfer between pc machine experiments, a detailed and comprehensive information on experimental procedures, socket program
videocap
- 基于FPGA的视频采集源程序，完整代码，以供参考-FPGA-based video capture source, the complete code for reference
62NIOS_II__driver
- dm9000 nios 下的驱动 fpga网络开发-failed to translate
DE2_70_NET
- 完成FPGA的网络通信，使用DM9000网络芯片 IP核，非常全面-DE2_70_NET，DM9000，can be used for communication with internet
fpga_UDP_NET
- fpga驱动dm9000，通过网口向上位机发送数据。底层为verilog，上层Nios为c。-fpga driver dm9000, send data through the network port up crew. The underlying verilog, upper Nios c.
Dm9000a_Init
- DM9000网口通信芯片控制模块，基于FPGA的控制模块，实现初始化，数据发送接收-The DM9000 network port communications chip control module, FPGA-based control module initialization, sending and receiving data
Dm9000a_Verilog
- 本文为实现高速数据的实时远程传输处理,提出了采用FPGA直接控制DM9000A进行以太网数据收发的设计思路，实现了一种低成本、低功耗和高速率的网络传输功能，最高传输速率可达100Mbps。-DM9000 driver
NEW_DM9000
- FPGA实现DM9000驱动网卡通信,shijuxin开发板-Implementation DM9000 driver card communication，SJX Development Board
DM9000_net
- fpga操作dm9000的代码例程 fpga操作dm9000的代码例程-FPGA operation dm9000 code routines FPGA operation dm9000 code routines
drv_dm900
- 这是去年我编写的基于xilinx FPGA的MAC IP 核开发的驱动DM9000的源代码。基于Verilog 语言。-This is the last year I wrote based on xilinx FPGA the MAC IP core developed DM9000 driver source code. Based Verilog language.
CD1_MT9V034_RAW_TRANS
- 基于FPGA的UDP网络图像传输实验，FPGA完成了MT9V034的RAW图像采集缓存，NIOS完成了图像的UDP封包，DM9000芯片完成了MAC和PHY的功能。-Based on the UDP FPGA network image transmission experiment, FPGA completed the RAW MT9V034 image acquisition cache, NIOS completed the image of the UDP packets, DM900
FPGA-CD0_UDP_NET
- 用FPGA驱动DM9000的程序代码通过UDP(Use FPGA to drive the DM9000 program code)