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  1. LatticeMico8_v3_0_Verilog

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  2. The LatticeMico8™ is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Crossover Programmable Logic Device architectures from Lattice. Combining a full 18-bit wide instruction set with 16 or 32 General Purpose r
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-09
    • 文件大小:1155008
    • 提供者:郭豪偉
  1. FPGA_design_part1

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  2. FPGA是英文Field Programmable Gate Array的缩写,即现场可编程门阵列,它是在PAL、GAL、EPLD等可编程器件的基础上进一步发展的产物。-FPGA is the English acronym for Field Programmable Gate Array, or field programmable gate arrays, it is in PAL, GAL, EPLD and other programmable devices based on the
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-18
    • 文件大小:4754514
    • 提供者:刘超
  1. DABreceiver

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  2. DAB接收机,包括信道解码的资料。DAB系统中载波频偏估计等。 -The Digital Audio Broadcasting (DAB) system promises to provide CD-quality sounds and flexible data services to mobile, portable and fixed receivers. In order to achieve high quality in multipath environment
  3. 所属分类:Communication

    • 发布日期:2017-04-10
    • 文件大小:1051613
    • 提供者:杨艳
  1. Newnes_Design_Recipes_for_FPGAs

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  2. This book is designed to be a desktop reference for engineers, students and researchers who use Field Programmable Gate Arrays(FPGA) as their hardware platform of choice.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-06
    • 文件大小:1371452
    • 提供者:Nima
  1. v

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  2. vhdl VHDL (VHSIC hardware descr iption language) is a hardware descr iption language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-25
    • 文件大小:231983
    • 提供者:dhaouadi
  1. FPGA-Median-Filter

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  2. Digital filtering algorithms are most commonly implemented using general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips and application- specific integrated circuits (ASICs) for higher
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:318053
    • 提供者:JAVAD
  1. SDRAM-USING

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  2. Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or application specific architecture. FPG
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-11
    • 文件大小:2638726
    • 提供者:javad
  1. TABLOO

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  2. Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or application specific architecture. FPG
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-31
    • 文件大小:248558
    • 提供者:javad
  1. XILINX-JTAG-PROGRAMER

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  2. Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or application specific architecture. FPG
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-28
    • 文件大小:19497
    • 提供者:javad
  1. DSPprogrammableFPGA

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  2. 本书的名字是《数字信号处理的FPGA实现》介绍了当前FPGA技术、元器件和用于设计最新DSP系统的工具-This book s name is Digital Signal Processing with Field Programmable Gate Arrays (Signals and Communication Technology)
  3. 所属分类:DSP program

    • 发布日期:2017-05-26
    • 文件大小:8928078
    • 提供者:王力
  1. survey

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  2. This paper provides a tutorial survey of architectures of commercially available high-capacity field-programmable devices (FPDs). We first define the relevant terminology in the field and then describe the recent evolution of FPDs. The three main
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-16
    • 文件大小:202778
    • 提供者:vipjvs
  1. dzim

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  2. 电子密码锁 基于FPGA设计的电子密码锁是一个小型的数字系统,与普通机械锁相比,具有许多独特的优点:保密性好,防盗性强,可以不用钥匙,记住密码即可开锁等。目前使用的电子密码锁大部分是基于单片机技术,以单片机为主要器件。在实际应用中,程序容易跑飞,系统的可靠性较差。本文介绍的一种基于现场可编辑门阵列FPGA器件的电子密码锁的设计方法,采用VHDL语言对系统进行描述,并在EP3C10E144C8上实现。-password lock FPGA-based design of the elect
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-03
    • 文件大小:436962
    • 提供者:zhu
  1. yyy

    0下载:
  2. 基于FPGA设计的电子密码锁是一个小型的数字系统,与普通机械锁相比,具有许多独特的优点:保密性好,防盗性强,可以不用钥匙,记住密码即可开锁等。目前使用的电子密码锁大部分是基于单片机技术,以单片机为主要器件。在实际应用中,程序容易跑飞,系统的可靠性较差。本文介绍的一种基于现场可编辑门阵列FPGA器件的电子密码锁的设计方法,采用VHDL语言对系统进行描述,并在EP3C10E144C8上实现。 通过仿真调试,利用可编程逻辑器件FPGA的电子密码锁的设计基本达到了预期目的。当然,该系统在一些细节
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-01
    • 文件大小:151004
    • 提供者:zhu
  1. 05695303

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  2. Orthogonal Frequency Division Multiplexing (OFDM) has been adopted by most wireless and wired communication standards these include wireless Local Area Networks (LANs) HyperLan2, 802.11a, broadband wireless(802.16) and lately the 802.15.3c for mill
  3. 所属分类:Communication

    • 发布日期:2017-12-07
    • 文件大小:535787
    • 提供者:boualem
  1. CC2430

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  2. iar IAR Systems即将发布支持ARM EABI开放标准的IAR Embedded Workbench(r) Version 5 for ARM(r),这是对公司的旗舰产品—编译器和调试器的重大升级,使之成为第一个独立支持最新的ARM Cortex(tm)-M1处理器的开发。 Cortex(tm)-M1是第一个特别为field-programmable gate arrays(s)而设计的ARM处理器。 -iar IAR Systems will soon release suppor
  3. 所属分类:Other windows programs

    • 发布日期:2017-11-20
    • 文件大小:969201
    • 提供者:王大枣
  1. FPGA-realization-of-a

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  2. This paper proposes a fully digitized hardware design scheme of a vector-controlled servo controller, which is verified and implemented on one-chip field programmable gate arrays (FPGA), for high-performance servo drives of the permanent magn
  3. 所属分类:Project Design

    • 发布日期:2017-03-23
    • 文件大小:412262
    • 提供者:xray
  1. FPGA

    0下载:
  2. FPGA是英文Field Programmable Gate Array的缩写,即现场可编程门阵列,它是在PAL、GAL、EPLD等可编程器件的基础上进一步发展的产物。它是作为专用集成电路(ASIC)领域中的一种半定制电路而出现的,既解决了定制电路的不足,又克服了原有可编程器件门电路数有限的缺点。 -FPGA Field Programmable Gate Array is the English abbreviation, ie, field programmable gate arrays,
  3. 所属分类:software engineering

    • 发布日期:2017-04-17
    • 文件大小:143944
    • 提供者:李金光
  1. FPGA

    0下载:
  2. FPGA(Field-Programmable Gate Array),即现场可编程门阵列,它是在PAL、GAL、CPLD等可编程器件的基础上进一步发展的产物。它是作为专用集成电路(ASIC)领域中的一种半定制电路而出现的,既解决了定制电路的不足,又克服了原有可编程器件门电路数有限的缺点。-FPGA (field programmable Gate Array), that is, field programmable gate arrays, it is a product of basic
  3. 所属分类:Project Design

    • 发布日期:2017-04-26
    • 文件大小:176953
    • 提供者:小丸子
  1. GCM-AES_Implementation_Spec_v2

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  2. AES GCM 算法介绍,对AES算法实现有一定帮助。-This document aims to explore hardware implementation of GCM-AES mode of operation specifically targeting FPGA [1] (Field Programmable Gate Arrays). The aim of such an implementation is to benchmark GCM-AES on FPGA in term
  3. 所属分类:Crypt_Decrypt algrithms

    • 发布日期:2017-03-23
    • 文件大小:255222
    • 提供者:宁进
  1. Source

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  2. This power point file consist of a lot of different vhdl code for component with source code VHDL (VHSIC Hardware Descr iption Language) is a hardware descr iption language used in electronic design automation to describe digital and mixed-signa
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-03
    • 文件大小:918899
    • 提供者:pouya
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