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JPEG2000_FPGA_Design
- 本论文主要论述JPEG2000中嵌入式块编码的FPGA设计，非常有参考价值-this paper mainly discusses JPEG2000 coding embedded blocks of FPGA design, a very valuable reference
JPEG2000_006.pdf
- 本文提出了一种基于提升算法的高效JPEG2000二维离散小波变换(2D—DWT)~ 结构，将边界延拓内嵌于离散小波变换过程中，减少了所需的内存空间和功耗。采用W 扫描输入方式和行列并行处理结构，加快了变换速度，大大提高了小波变换的效率。整个二维离散小波变换结构已经通过FPGA硬件仿真验证。-This paper presents a highly efficient algorithm based on lifting JPEG2000 two-dimensional discrete wave
MQdecoder
- Verilog HDL 实现的JPEG200的MQ解码-JPEG2000 MQ DECODER BASED ON FPGA， Verilog HDL
chaosFPGA
- chaos system in JPEG2000, Implemented by FPGA
JPEG2000_fpga_vlsi
- 个人搜集的JPEG2000编解码资料，侧重于FPGA/VLSI实现-Personal collection of JPEG2000 compression/decompression algorithm for FPGA/VLSI
JPEG2000onFPGA
- 基于FPGA的JPEG2000图像压缩系统的嵌入式开发，哈尔滨工业大学 硕士论文，作者：汪怀彬。-Embedded Development of JPEG2000 Image Compressing System on FPGA，WangHuaiBin，Dissertation for the Master Degree in Engineering, Harbin Institute of Technology
04735007
- efficient FPGA implementation of JPEG2-efficient FPGA implementation of JPEG2000
CU26664669
- FPGA Implementation of JPEG2000 Image Compression using Modified DA based DWT and Lifting DWT - IDWT Technique