搜索资源列表
BCDADD
- 本程序完成多个BCD码加法,并完成到十进制裁转换-completion of the procedures BCD adder, and complete the conversion to decimal Conference
Verilog_Development_Board_Sources
- 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code q
verlog_basic
- 用verlog语言编的一些基础实验,适合于FPGA/CPLD的初学者。内容包括8位优先编码器，乘法器，除法器，多路选择器，二进制转BCD码，加法器，减法器等等。-verlog used some language addendum to the basic experiment, which is suitable for FPGA / CPLD beginners. Including eight priority encoder, multipliers, dividers, multi-p
pic_bcd_add_sub
- PIC单片机精简BCD加法减法汇编程序，支持任意多字节运算，执行效率很高-PIC Singlechip BCD adder subtraction compilation streamline procedures, to support any multi-byte operations, the implementation of efficient
BCD_ADD
- 实现BCD码的加法，用VHDL实现，是书籍上配套的-BCD ADDER，Using VHDL
bcd
- 实现一位BCD码的加法，并且带有进位。还可以利用逻辑电路实现此功能。-Code to achieve a BCD adder, and a binary. Logic circuits can also be used to achieve this functionality.
bcd_adder
- verilog code for bcd adder
Parallel-adder
- 并行加法器是一种数位电路，其可进行数字的加法计算。在现代的电脑中，加法器存在于算术逻辑单元（ALU）之中。 加法器可以用来表示各种数值，如：BCD、加三码，主要的加法器是以二进制作运算。-Parallel adder is a digital circuit, which can be calculated the number of addition. In the modern computer, adder exists in the arithmetic logic unit (ALU)
bitbcdadder
- bcd adder implemented in three models of vhdl
BCD8
- BCD码十进制8位加法器，采用超前进位的方法-8-bit decimal BCD adder yards, using look-ahead approach
Advanced_Adders
- Advanced topic on adders including: Carry Look Ahead Adder, Binary Parallel Adder/Subtractor, BCD adder circuit, Binary mutiplier circuit.
bcd-adder
- its bcd progrrame in mentor graphics
A-New-Reversible-Design-of-BCD-Adder
- Designing a BCD adder
A-Novel-Reversible-BCD-Adder-For-Nanotechnology-B
- A Novel Reversible BCD Adder For Nanotechnology Based System
Design-and-Optimization-of-Reversible-BCD-Adder-S
- Design and Optimization of Reversible BCD Adder-Subtractor Circuit
Design-of-Optimized-Reversible-BCD-Adder-Subtract
- Design of Optimized Reversible BCD Adder-Subtractor 229
Optimized-design-of-BCD-adder-and-Carry
- Optimized design of BCD adder and Carry
Optimized-reversible-BCD-adder-using-new
- Optimized reversible BCD adder using new
BCD-adder
- 用VHDL语言设计一个BCD码加法器，输入A[3..0]、B[3..0],输出为SUM[4..0]。-bcd adder
A-New-Reversible-Design-of-BCD-Adder
- This a good implementation of reversible adder-This is a good implementation of reversible adder