搜索资源列表
clk_divider
- Simple Clk Divider for FPGA design in Verilog -Simple Clk Divider for FPGA design in Verilog
clkdiv
- 该模块是一个常用的clk分频器;其内部参数可以动态调整!(This module is a common CLK frequency divider; its internal parameters can be dynamically adjusted!)