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PDCWanNew051203
- vc开发的PCI总线加密卡 PCI开发卡主要由PCI9054、93C56、16M晶振和相应的跳线、控制地址数据线等部分组成。PCI9054是PLX公司的PCI主模式桥芯片，具体芯片的说明请见Data Book；93C56是EERPOM，用于向PCI9054的初始化设置信息；16M晶振向9054提供总线时钟和CPLD7128S提供时钟；跳线用于PCI9054的设置，控制地址数据线将PCI9054的Local Bus信号线引出来，用于实验板用。-vc development of the PCI
fpgapcicom
- PCI是一种高性能的局部总线规范，可实现各种功能标准的PCI总线卡。本文简要介绍了PCI总线的特点、信号与命令，提出了一种利用高速FPGA实现PCI总线接口的设计方案。 -PCI is a high-performance local bus standard, achievable standards for the various functions of PCI cards. This paper describes the features of the PCI bus, the s
PCI-to-PCI.Bridge.Architecture.Specification.Rev1.
- PCI-to-PCI Bridge Architecture Specification Revision 1.1 This specification establishes the requirements that a PCI-to-PCI bridge must meet to be compliant to this specification and the PCI Local Bus Specification. In addition, the requireme
S5335DK_Software_v1_2.ZIP
- The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them clos
S5335DK_Hardware_v1_2.ZIP
- The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them clos
yxw_bob_PCI_demo
- The Lite Evaluation/Demonstration Kit is intended to illustrate use of the AN3042. The AN3042 is compliant to the PCI 2.1 Local Bus specification. Included in the kit is a PCI add-in card, Windows drivers, demonstration applications, and doc
pci.tar.gz 完成WB BUS和PCI bus之间的传输
- verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输,The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus and the PCI local bus. It consists of two independent units, one handling transact
PCI3
- pci3.0规范 PCI Local Bus Specification Revision 3.0-pci3.0 norms
pcirw
- quartusII环境下实现FPGA与PCI9054通信。根据PCI9054规范控制lhold、lholda、ads、blast、lbe、lwr等握手信号的时序，可完成上位机通过PCI总线读写FPGA本地地址空间的功能- Communication between FPGA and PCI9054 in QuartusII IDE.Implementation for the timing of handshake signals such as lhold, lholda, ads,bla
2ic
- 最新芯片资料，各种总线协议，ISA，PCI X，GPIB-The latest chip data, a variety of bus protocol, ISA, PCI X, GPIB
minipci
- MINIPCI 接口规范,包含物理,数据,等等内容-The Mini PCI Specification defines an alternate implementation for small form factor PCI cards referred to in this specification as a Mini PCI Card. This specification uses a qualified sub-set of the same signal protoco
istars_PCI
- PCI 总线规范是由 INTEL公司为首的一个 PCI 特别兴趣小组（PCI SIG）制定并维护的 一种 32/64 位局部总线， 可进行 32 位寻址， 也可以进行突发传送。 其最高传输能力为 132MB/S （32 位时）-PCI bus specification by INTEL Corporation, headed by a PCI Special Interest Group (PCI SIG) to develop and maintain a 32/64 bit loc
PCI
- 本文针对数控系统的工作特点和要求,通过对TI公司DSP芯片TMS320LF2407A和Cypress公司PCI接口芯片CY7C09449PV-AC的功能和特点进行深入分析,设计了一种基于PCI局部总线的步进电机运动控制卡-In this paper, numerical control system characteristics and requirements, through the DSP of TI company TMS320LF2407A and Cypress chip PCI
PCIDSP
- 本文针对数控系统的工作特点和要求,通过对TI公司DSP芯片TMS320LF2407A和Cypress公司PCI接口芯片CY7C09449PV-AC的功能和特点进行深入分析,设计了一种基于PCI局部总线的步进电机运动控制卡。该卡能够较好地满足数控系统对运动控制部件的实时性和控制精度的苛刻要求。-In this paper, numerical control system characteristics and requirements, through the DSP of TI company
opencore_crt
- 可以在Altera QuartusII下编译的Open Cores PCI桥源代码，是经过多天辛勤整理修改才完成的-Open Cores PCI bridge source code that can be compiled at Altera QuartusII. Modified under many days of hard work
20104169105873879
- 主要功能：pci9054芯片本地总线控制示例程序，可用于pci驱动和应用程序的测试。每隔一段时间产生一次中断，产生1，2，3等递增数据，配合pci9054驱动和应用程序完成数据传输 2.说明：文件夹内是Quartus 9.0的工程文件，使用Verilog语言，使用器件是Cyclone2，应用于其他FPGA时，直接调整管脚即可。-Main features: pci9054 local bus control chip sample program can be used for pci driv
IFSPCI_IP
- PCI5054 C模式源码， PLX9054作为一种接口芯片，在pci总线和local总线之间传递信息。PCI卡就是利用plx9054的这一特性，通过接口控制电路 ，为外围设备和pc机间 搭建一座硬件桥，完成数据的顺利传输。-Source of the PCI5054 C, mode, PLX 9054 chip as an interface between the pci bus and local bus pass information. The PCI card is the use
Formal-Verication-of--the-PCI-Local-Bus
- Formal Verication of the PCI Local Bus Using Verilog-Formal Verication of the PCI Local Bus Using Verilog
pci9504
- Verilog 语言编写 PCI9054 控制器的接口电路，实现 PCI总线到本地 8 位总线的转接控制(The Verilog language writes the interface circuit of the PCI9054 controller to realize the transfer control of the PCI bus to the local 8 bit bus)