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FIFO
- 先入先出FIFO,用QUARTUS进行仿真-FIFO FIFO, the simulation with QUARTUS
CoreSPI
- 数字电子设计fpga设计的spi接口的ip_core,可以直接用于在fpga设计,支持actel的fpga芯片,支持主从模式,fifo大小可选。-Fpga design of digital electronic design spi interface ip_core, fpga design can be directly used to support actel the fpga chip, support master-slave mode, fifo size options.
