搜索资源列表
ad9777的测试程序，对spi进行初始化，运用ISE环境，成功地进行综合和实现.rar
- ad9777的测试程序，对spi进行初始化，运用ISE环境，成功地进行综合和实现
SD控制器和spi控制器
- 基于fpga的verilog 收到卡读写程序
spi slave
- spi 接口的VHDL和verilog实现。slave模式
mcu-cpld-spi.mcu与cpld之间spi接口程序
- mcu与cpld之间spi接口程序，mcu为master，cpld用verilog写成slave模块,mcu with spi interface program between the CPLD, mcu for the master, cpld written using verilog slave module
spiBusverilog.rar
- spi串行总线接口的verilog实现，详细讲解实现过程。,spi serial bus interface verilog realization elaborate on the realization of the process.
ssp_arm.rar
- arm 的ssp—spi verilog源代码,arm of the ssp-spi verilog source code
spi-in-verilog-implementation
- spi的verilog实现(非常的全面和详细，还带有spi算法的注解).-spi in verilog implementation (a very full and detailed, but also with the spi algorithm annotation).
spi
- verilog spi 源码（来自网络）-verilog spi
spi
- verilog语言写的spi接口（层次化设计，便于升级）-The implememt of spi interface using verilog HDL
QUAD-spi-verilog
- 难得的spi NOR Flash控制器verilog源代码，支持四路串行通道！-Rare spi NOR Flash controller verilog source code, supports four serial channels!
wince+spi
- verilog vcspi file with testbench
spi.tar
- This is a verilog code used oversampled clock to implement spi slave. Also include C code for a ARM processor as the spi master-This is a verilog code used oversampled clock to implement spi slave
spi
- spi verilog code with programmable clock
rtl
- spi verilog RTL code
spi
- spi IP CORE verilog quartus-spi IP CORE verilog quartusii
spi
- spi verilog 代码 有代码和TB 以及文件说明-spi verilog
verilog-spi-core
- 用verilogHDL写的spi 核的例子-A simple example of spi core using verilog HDL
Nitro-Parts-lib-spi-master
- Nitro-Parts-lib-spi verilog spi master and slave
spi
- spi（Serial Peripheral Interface，串行外设接口）是Motorola公司提出的一种同步串行数据传输标准，是一种高速的，全双工，同步的通信总线，在很多器件中被广泛应用。 spi相关缩写 SS: Slave Select，选中从设备，片选。 CKPOL (Clock Polarity) = CPOL = POL = Polarity = （时钟）极性 CKPHA (Clock Phase) = CPHA = PHA = Phase = （时钟）相位
SD spi模式verilog外加modelsim仿真结果
- SD卡的spi模式verilog代码，外加modelsim仿真结果。(SD card's spi mode verilog code, plus the simulation results of modelsim.)